Mon, Jul 13, 2020 05:51 PM - Updated

STAFF / SENIOR STAFF FPGA ENGINEER - COMPUTER VISION AND DEEP LEARNING - didier@teradeep.com

Reply to: Use the form at the right to send messages to this user.
Date: Sat, Feb 27, 2016 07:23 PM

DESCRIPTION

About the role

TERADEEP INC. develops Deep Learning HW & SW Acceleration solutions for datacenter applications. We are seeking an experienced hands-on FPGA Engineer. You will work closely with Teradeep Hardware and Software Engineering teams to design the next generation of machine-learning accelerators. This is an exciting position that requires mastery of hardware and software in order to solve complex engineering problems. You will implement computer architectures on families of programmable devices, and optimize them to run specific machine-learning algorithms.

Duties & Responsibilities

• Strong FPGA design knowledge, both from a developer and project lead perspective

• Implement custom computer architectures and modules for machine learning accelerators on families of different FPGAs

• Find and fix hardware implementaion bottlenecks, timing closure, latency.

• Capable of functional and architectural definition, floor-planning, simulation, implementation and verification of complex FPGA devices comprising a mix of custom RTL with hard and soft vendor IP cores.

• Work in a team to design new architectures, find performance bottlenecks, break architecture in parts, manage team members contribution

• Work at entire architecture, system level, integrate modules and components while maintaining overall system performance and targets

• Interface FPGA with Linux/unix on embedded devices, server cards

• Responsible for stability of the system over long periods of time

• Write and maintain basic low-level compiler and interpreter software for custom architectures

• Interact with manufacturer of FPGA boards and servers
REQUIREMENTS

Candidate Qualifications:

• BS/MS in Computer Science, Computer Engineering, Electrical Engineering, Physics or related experience

• Minimum 3+ years experience in FPGAs development and implementation

• Experience with RTL coding using Verilog

• Proficiency in all phases of FPGA development

• Proficiency in developing automated self-checking test benches

• Ability to integrate FPGA co-processors into embeeded processor systems

• Experience in video streaming and/or image processing products

• Experience with Xilinx FPGA devices, Xilinx Zynq, Vivado software or similar

• Experience with high speed digital bus interfaces, such as AMBA AXI, PCI bus

• Working knowledge of digital control interfaces such as Ethernet, SPI, I2C, RS-232 or similar

• Excellent writing and presentation skills, proven by international level conference participation, acclaimed web blogging

Bonus Qualifications:
• Entrepreneurial aspirations and motivation

• Background in Linux administration

• Experience with OpenCL and SDAccel

• Experience in writing RTL for SoC, SoC implementations, basic VLSI knowledge

• Machine learning knowledge and background

• Experience in professional low-level compiler and interpreter software for custom architectures
BENEFITS

Early equity in a startup that is revolutionizing Machine / Deep Learning in Datacenter
Competitive package of base pay and stock options
Generous health, dental and vision coverage for employees and family members, along with commuter pre-tax program
Opportunity to make a meaningful impact on the disruption of an industry and to shape the building of a company and culture
Chance for your direct input to be realized and put into action
Freedom to stretch the boundaries of your past work experience, learn skills outside of your immediate job description and grow your career
Autonomy, flexibility and a flat corporate structure
A fully stocked kitchen with breakfast, juice bar, soft drinks, unlimited snacks and fresh fruit every day to stay fueled
A subsidized gym membership to keep the mind clear and the body strong
Generous budget for any software or books you need to make your life more efficient and develop your knowledge
Relaxed & informal office environment

Principals only. No recruiters, thanks.

please do not message this poster about other commercial services